1. Field of the Invention
The present invention relates to an arbiter and arbitration method and, more particularly to an arbiter and an arbitration method used in a multiple devices system, which can quickly and efficiently arbitrate bus usage request sent by each device so as to improve the bus usage efficiency.
2. Description of the Background Art
Rapid development of semiconductor production process has greatly accelerated Integrated Circuit (IC) design; in particular, Deep Sub Micron (DSM) technology has promoted System on Chip (SOC) design to the front of IC design. The SOC is to integrate plural processors on various chips onto a common chip, so as to form an integrated system having optimal function and performance. Compared with multi-chip system, die size and package pins of the SOC have greatly decreased, so production cost has largely reduced. On the other hand, as Intellectual Property (IP) reusing has shortened the design period of the SOC, design cost has also reduced.
SOC may comprise various processors (such as Central Processing Unit (CPU), Digital Signal Processor (DSP), Application Specific Integrated Circuit (ASIC) and so on) and memories. In addition, the SOC may also comprise sub-systems embedded with processor cores. Considering that SOC is more complicated than multi-chip system, how to effectively control operation of each processor or sub-system is very important during a system design. Bus structure is used to accomplish intercommunications including instruction transfer and data transfer among the processors or sub-systems in the system, accordingly, design of the bus structure is crucial to the collaborative work of the whole system.
In a signal transfer among multiple devices of a bus system, a device which sends a request to the bus asking for data transfer is called a master device; whereas a target device which will receive the data transfer from the master device is called a slave device. Arbiter is used in the bus system to arbitrate bus usage requests sent by the devices of the multiple devices system, such that a device which has the use privilege of the bus can be decided by use of various algorithms. According to arbiter configuration, the present bus structure includes distributed and centralized bus structure. In the distributed bus structure, each device is configured with a correspondent arbiter, and one device can be authorized to use the bus through the arbiters' competition. In the centralized bus structure, only one arbiter is used, and one device can be authorized to use the bus according to a predetermined arbitration method which centralizedly arbitrates bus usage requests sent by all devices. It is easily understood that the arbiter especially in the centralized bus system plays an important role to the bus usage efficiency.
In the prior art, if a master device sends a bus usage request to the arbiter and is authorized to use the bus, the master device may always occupy the bus till the transfer operation is completed, accordingly no response to bus usage requests sent by other master devices will occur. Therefore, designers may set priority to the master devices, and the bus usage request sent by the device having high priority can be responded firstly on the same condition during the arbitration of the arbiter. Additionally, some designers propose to set priority to the bus usage requests sent by the master devices, and the arbiter can respond to the bus usage request according to its priority. But hardware design and algorithm of the arbiter may be complicated if the arbiter is used to arbitrate bus usage requests having different priority, and the arbitration period may also be delayed.
On the other hand, in a bus system supporting separated read operation such as a bus system having multithread master devices, before a slave device responds to a read operation sent by one thread of a master device, signal transfer operations (certainly including read operations) sent by other threads of the master device may also be permitted, accordingly, multiple threads may be waiting for data of the corresponding slave devices, in such case, if the slave device corresponding to the earlier read operation needs more data preparation time, returning data for the read operations of other threads must be affected according to the sending order of the read operations. In order to improve the bus usage efficiency, prepared data is permitted to return at first without considering the sending order of the read operations; whereas returning data conflict may occur while different slave devices send data to the bus at the same time, as a result, access delay may be increased and bus efficiency may be reduced.
To solve the problems mentioned above, an improved arbiter and its arbitration method are provided in the present invention, which can do forward direction arbitration as well as reverse arbitration. In the forward direction arbitration, it can set arbitrating opportunity against different bus usage requests. In the reverse arbitration, it can arbitrate returning data requests sent by different slave devices.